Technology / Technical guide
Miller Capacitance, Gate Charge & Switching-Node Coupling
A semiconductor’s control terminal can interact electrically with its changing power terminal through capacitance. In a MOSFET model, gate–drain capacitance is commonly associated with Miller behaviour. This coupling helps explain gate charge and switching transients without treating the gate as an isolated ideal command.
A changing power-node voltage can exchange charge with the gate.
Capacitance, integrated charge and a driver’s voltage response are related quantities, but they are not interchangeable specifications.
01 / Terminal network
The gate participates in several capacitances.
A simplified MOSFET capacitance model distinguishes gate–source, gate–drain and drain–source contributions.
A simplified MOSFET capacitance model distinguishes gate–source, gate–drain and drain–source contributions. Gate–drain capacitance connects the control terminal to a power terminal whose potential can change rapidly. That connection is a device-level mechanism rather than a separate intentional control command.
Nexperia’s technical note identifies the gate–drain contribution commonly called Miller capacitance. The broad device name does not establish its value, and a material platform such as SiC does not remove the need to understand the relevant terminal model.
02 / Charge flow
A changing differential voltage creates a coupling current.
For an ideal constant capacitance between two nodes, its charge is proportional to the voltage difference and its current is the rate of charge change.
For an ideal constant capacitance between two nodes, its charge is proportional to the voltage difference and its current is the rate of charge change. Thus a faster change in drain-to-gate voltage can create a larger coupling current in that restricted model.
The sign depends on the chosen voltage and current references. An external drain-voltage change and a gate-voltage change both enter the differential quantity. Treating only one absolute node voltage as the input can hide the fact that the reference node also moves.
03 / Nonlinear value
One capacitance number need not describe the full transition.
Real device capacitances can vary with terminal voltage.
Real device capacitances can vary with terminal voltage. A small-signal capacitance at one bias describes a local relationship, while a finite transition exchanges integrated charge along a voltage path. The effective relationship is not necessarily one constant C multiplied by the full voltage excursion.
Gate-charge curves represent another boundary and come with their stated conditions. Charge has units of coulombs; capacitance has units of farads. A gate-charge number cannot be relabelled as a capacitance without specifying what voltage change and conditions are being represented.
04 / Miller region
Gate charge can accompany a changing power-terminal voltage.
During an applicable switching transition, part of gate-charge exchange accompanies a substantial change in drain voltage.
During an applicable switching transition, part of gate-charge exchange accompanies a substantial change in drain voltage. A gate-voltage trace can then show a comparatively flat region commonly called a Miller plateau. It reflects the coupled transition and circuit conditions.
The plateau is not a universal fixed-voltage step for every device and waveform. Its shape depends on the represented transition. A visible feature does not independently establish a transistor type, actual gate-drive voltage or the time needed to complete a different operating event.
05 / Gate response
Coupled current interacts with the surrounding drive path.
The gate’s resulting voltage depends on the complete impedance and reference paths, not capacitance alone.
The gate’s resulting voltage depends on the complete impedance and reference paths, not capacitance alone. A drain-related transient can influence a gate voltage even when the intended logical request has not changed. A coupled current and an unwanted conducting state are separate conclusions.
The driver-reference guide explains local gate voltage and supply boundaries. Whether a disturbance reaches a conducting condition is equipment-specific; this conceptual explanation supplies no threshold, clamp circuit or mitigation recipe.
06 / Model scope
Device coupling is not a full EMC result.
The noise-mode guide describes conductor-pair disturbances at a different boundary.
The noise-mode guide describes conductor-pair disturbances at a different boundary. Device-level coupling can contribute to an assembly response, but it cannot independently predict every emission, immunity result or measured waveform.
No MARSTON Cgd, gate charge, plateau voltage, transistor technology or Miller-control feature is assigned. The guide gives no gate-resistor change, clamp setting, bias adjustment or live probing method; it explains why terminal capacitance and charge belong to a coupled model.
Related technical guides: High-Side Gate Drive & Bootstrap Supply Principles · Parasitic Inductance, Current Slew & Switching Overshoot · Inverter Dead Time: Commutation Interval & Waveform Error.
General background: Nexperia: terminal capacitance and gate-charge distinctions in a stated device family · Texas Instruments: Miller-region charge exchange in a stated switching model. These references explain industry concepts; they are separate from the applicable MARSTON product and project documents.
Key concepts and conditions.
Read each quantity with its reference, units and stated conditions. A general relation does not establish a model-specific value.
| Concept / quantity | Meaning / relation | Conditions / limits |
|---|---|---|
| Gate–drain coupling | Device capacitance between terminals | Different from an intentional gate command. |
| Charge | q in coulombs | Finite transition follows a stated voltage path. |
| Constant-C current | i = C d(vdifference)/dt | Ideal local model and declared signs. |
| Small-signal capacitance | Local charge/voltage slope | Bias conditions need not represent a full transition. |
| Gate response | Coupling plus complete drive path | Capacitance alone does not establish unwanted conduction. |
Engineering questions.
Is Miller capacitance a controller algorithm?
No. It describes a terminal-coupling mechanism in an applicable device model.
Does fixed gate logic imply no coupled gate current?
No. A changing power-terminal voltage can exchange charge through the coupling.
Are gate charge and capacitance the same quantity?
No. They have different units and represent different relationships.
Is every Miller plateau at a universal voltage?
No. Device and circuit conditions affect the transition.
Does coupling automatically prove a false turn-on?
No. The complete gate response and conducting conditions must be distinguished.
Does this specify a MARSTON driver modification?
No actual parameter, protection feature or adjustment is provided.
Technical enquiry
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